Poor Men's SMU, part 3: Diodes are Forever

Posted on zo 17 januari 2021 in NLNet • Tagged with PM-SMU

This is third part on my adventures with the AD5522 SMU development board. For history you can look at part 1 and part 2.

After getting the SMU working and being able to operate it from Jupyter notebooks on a raspberry Pi I now decided to use the device to …


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Poor Men's SMU, part 2

Posted on za 09 januari 2021 in NLNet • Tagged with PM-SMU

This is a continuation of my adventure with the AD5522 development board (see part 1 ). I did make progress on setting it up but as always it has taken much more time than wanted to debug the setup.

Schrödinger's cat

One problem I had to solve was that the setup …


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Poor Men's Source Measurement Unit (SMU)

Posted on zo 03 januari 2021 in NLNet • Tagged with PM-SMU

SMU ?

In my previous professional life doing semiconductor process development I used so called source measure units (SMUs) for measuring out transistors. Although I don't remember the exact type number, I guess I had access to a HP 4145A semiconductor parametric analyzer.

Nice thing about these units is that these …


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Fixing the ESD generator

Posted on zo 01 november 2020 in NLNet

This is a continuation on my previous blog on first tests on the ESD generator.

Problems

After some more debugging the voltage multiplier of the ESD Generator has been made to work. Detailed simulation results of the problems can be found in this Jupyter notebook in the created sim folder …


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First testing of and changes to ESD generator

Posted on zo 04 oktober 2020 in NLNet

As reported in a previous blog post I am working on a small circuit to generate high voltages for some ESD testing. I now received the PCBs and the components for on the PCB and even did find some time to do the first testing of the design. As a …


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ESD Generator: high voltage generator for ESD testing

Posted on zo 12 juli 2020 in NLNet

After tape-out of NLNet018TV I am now working on implementing the test procedures and gathering the equipment needed for executing the tests.

For ESD testing high voltages with limited charges need to be generated. This high voltage charge is then applied over two pins on the test chip to see …


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NLNet018TV: a fully automated test chip design

Posted on za 13 juni 2020 in NLNet

I am working on a NGI0 NLNet funded project and I now did reach a first milestone in the project. I did tape-out a test chip which kept me busy for the last two months and is also the reason I neglected this blog the last months. The milestone is …


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