Two More Reports on Scalable Analog blocks
Posted on vr 30 september 2022 in NLnet
The first results for the NGI Zero PET funded Analog/Mixed-Signal Library project were already presented in a previous blog post. Now the scalability reports on the rest of the analog blocks have been made available by LIP6; one for a DAC and one for a PLL.
DAC
A comparison was made between the so-called R-2R and a capacitive DAC architecture. Scaling implication have been investigated and a comparison of the two architectures were made. You can find the details in the report authored by Marie-Minerve Louërat.
PLL
Here the scalability implications of a classic PLL architecture with a phase-frequency detector, a charge pump with loop filter and a voltage controlled oscillator (VCO) was investigated. The details for this one can be found in the corresponding report authored by Dimitri Galayko